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Huawei team claims post‑training DeepSeek 1.6T model on 1,000 Ascend chips

Huawei-led researchers say they have post‑trained DeepSeek's 1.6‑trillion‑parameter model using a fleet of 1,000 Ascend 910C chips, a claim announced on June 6, 2026.

AITREND AI EditorialJune 7, 20263 min read

Lead

On June 6, 2026, a Huawei‑led team announced that it had post‑trained DeepSeek's 1.6‑trillion‑parameter model using a cluster of 1,000 Ascend 910C chips.

Context

DeepSeek, the original creator of the massive language model, released a 1.6‑trillion‑parameter architecture that has drawn attention for its scale. Huawei, a major player in AI hardware, says its engineers took the pre‑existing model and applied a further training phase—often called post‑training—to adapt it for new tasks or improve performance. The effort reportedly relied on a dedicated array of Ascend 910C accelerators, a chip line designed for high‑throughput AI workloads.

The claim surfaced through a Google News AI Chips feed, which aggregates technical announcements from the industry. No additional technical details, such as the duration of the training run or the specific data used, were provided in the brief report.

Impact

If verified, the use of 1,000 Ascend 910C chips for a single post‑training run signals that Huawei can marshal significant compute resources on its own silicon. That capability could reduce reliance on external cloud providers for large‑scale model refinement, potentially lowering costs for Chinese AI developers who prefer domestic hardware.

For the broader AI community, the announcement adds another data point about the hardware requirements needed to handle models beyond the trillion‑parameter threshold. Researchers and enterprises watching the race for ever‑larger models may take note of the hardware footprint described here, as it suggests a concrete baseline for future projects.

What’s Next

Huawei has not disclosed when the post‑trained model will become publicly available, nor have they detailed any performance benchmarks that would allow independent comparison with other large models. Observers will likely look for follow‑up statements, technical papers, or benchmark releases that confirm the claim and explain the practical gains achieved through the post‑training step.

In parallel, the AI field continues to track how hardware advances intersect with model scaling. Whether Huawei’s approach will spur other firms to build similar chip clusters, or whether cloud providers will respond with larger, more flexible offerings, remains to be seen. The next few weeks should reveal whether the post‑training claim translates into measurable improvements that can be reproduced by the community.

FAQ

Q: What does "post‑training" mean in this context?

A: Post‑training refers to an additional training phase applied after a model's initial pre‑training, often to specialize the model for particular tasks or to fine‑tune its behavior.

Q: How many chips were used for the training?

A: The report states that 1,000 Ascend 910C chips were employed.

Q: When was the claim made?

A: The announcement was published on June 6, 2026.

Topics Covered
AIHuaweiDeepSeekAscend 910CLarge Language Model
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